Multichip fan out project for IoT taps European expertise
origin : EE Times
Date : 2017-11-14
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A key project to develop multichip fan out wafer level packages for the next generation of 3D stacked chip in the Internet of Things (IoT) has tapped expertise from several European companies. The A*STAR Institute of Microelectronics (IME) in Singapore has set up a development line to accelerate the development of fan-out wafer level packaging (FOWLP) capabilities for next-generation Internet of Things (IoT) technologies. The FOWLP development line is built upon existing infrastructure at IME’s facilities at Singapore Science Park II and new facilities at Fusionopolis Two. This will allow IME and partners such as equipment maker SPTS (part of Orbotech) in Newpart, Wales, with thermal secialist ERS Electronic in Munich, Germany, to develop technologies tfor IoT applications in consumer electronics, healthcare and automotive. FOWLP is an emerging chip packaging technology for ultralow power devices with smaller package profiles and higher performance, all at a lower cost. The FOWLP development line is equipped with fully automated tools that can perform the “mold-first” and “Re-Distribution Layer (RDL)-first” method in multichip fabrication. The “RDL-first” method is expected to achieve a higher reliability rate compared to the conventional “mold-first” method traditionally used by the semiconductor industry. IME and its partners will jointly develop tools and processes for next-generation FOWLP technologies such as high speed copper pillar plating, Physical Vapour Deposition (PVD) processing to control the wafer warping, moldable underfilling for Chip-to-Wafer, as well as over molding on wafer with vertical copper pillar and wire interconnections using wafer level compression molding, plasma descum of small vias and warping adjustment. The line will be a test bed for testing and developing new processes, paving the way for high-volume manufacturing. Through this development line, fabless companies could also make quicker decisions on package structure, integration flows, processes, materials and equipment for their new products; so materials and equipment suppliers could expedite the development of their products and increase their adoption. “The launch of IME’s FOWLP development line and consortium will enable us to advance pre-competitive R&D that positions the semiconductor industry for growth opportunities in the thriving IoT market. Through an open and collaborative approach, the consortium will drive the development and the transfer of innovative technologies from pilot-scale to commercial production more easily and quickly,” said Dr. Tan Yong Tsong, Executive Director at IME. "This broad industry cooperation will help solve one of the largest challenges faced by the semiconductor industry in the area of achieving higher density in advanced packaging. ERS is committed to developing new thermo-management solutions to enable next generation of FOWLP technologies,” said Klemens Reitinger, Chief Executive Officer of ERS Electronic. Other partners include Applied Materials, Asahi Kasei, Dipsol Chemicals, Fujifilm, JSR, Kingyoup Optronics, Kulicke & Soffa, Nordson, Open-Silicon, STATS ChipPAC, Toho Kasei and TOWA.